VLSI Chip Design and Simulation with Electric VLSI EDA Tool
This course provides a comprehensive exploration of CMOS VLSI design and simulation, covering IC technology, CMOS structures, historical timelines, processor intricacies, MOS transistor design, non-ideal characteristics, power dissipation, low-power design techniques, and practical insights into CMOS logic gates. Participants will delve into fundamental components and circuit design in the "Analog Circuit CMOS Chip Design and Simulation" module, using the Electric VLSI EDA tool. This includes stick diagrams, tool installation and usage, and hands-on experience in schematic/layout representations, enhancing electronic circuit design proficiency. In the "Digital Circuit CMOS Chip Design and Simulation" module, participants create systematic workflows for schematic/layout designs using the Electric VLSI EDA tool. The curriculum covers logic gates, and half adder circuits, providing a holistic understanding of CMOS logic circuit design. Throughout the course, participants acquire a robust skill set, combining theoretical knowledge with practical expertise in CMOS VLSI design and simulation.
By the end of this course, you will be able to:
Develop a profound understanding of Integrated Circuit (IC) technology, exploring its historical timeline and key inventions.
Discuss Moore’s Law and technology scaling, recognizing the importance of processors in Very Large-Scale Integration (VLSI).
Gain proficiency in MOS transistors, explaining their types and comprehending their working process, including operational modes of both PMOS and NMOS transistors.
Describe ideal transistor I-V characteristics and delve into non-ideal transistor characteristics, including leakage currents and their impact on device performance.
Understand the workings of the CMOS inverter, covering both its static behavior and power dissipation characteristics.
Explain components and mechanisms involved in CMOS power dissipation, addressing both static and dynamic aspects.
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